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PowerPack
683xx
PowerPack 68360
PowerScope BDM Debugger
683xx
Support
The
PowerPack 683xx development system consists of a chassis that communicates
with the host PC, and a processor-specific probe that supports real-time
emulation of the Motorola 68331, 68332, 68340, or 68HC16Z1.
Source
level debug support and full emulator control are provided by the Microsoft
Windows-based PowerPack SLD interface.
 Open
a new browser window
to see a short SLD Demo.
System
Features
- Full
speed, zero wait state operation for the following processors:
68F333, 68HC16Z1 to 16 MHz
68331, 68332 to 20 MHz
68340 to 25 MHz
- Integrated
C source-level debug in a Microsoft Windows interface
- Long
flexible emulator-to-pod cables and small profile probe head
- 128K
or 256K frame trace buffer
- Up
to 256 logical trace buffers
- 8
event recognizers
- 4-level
sequential triggering
- Timestamp
with clock cycle resolution
Available
Options
- Overlay
memory
- 256K,
1 MB or 4 MB
- 256K
frame trace buffer
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Motorola
68360/68EN360/68MH360
The
PowerPack?68EN360 in-circuit-emulator is a full-featured emulator that
provides real-time, transparent emulation at the full processor speed.
It has up to 2 MB of optional overlay memory for easy mapping of
target ROM code and data RAM, either as SRAM or DRAM, with or without
parity enabled. It supports the 33 MHz 68360 or 68EN360 at zero wait
states.
Source
level debug support and full emulator control are provided by the PowerPack
SLD interface, which provides a split-view source window, browsing to
any module and function, setting breakpoints on individual statements,
double-clicking on a variable to add to the variable watch window, and
mixed source/assembly view of executable code.
Open
a new browser window to see a short SLD Demo.
System
Features
- 33
MHz, zero wait state operation
- Automatic
configuration for 3.3V or 5.0V ?no jumpers
- Complete
non-intrusive design ?uses no target address space, runs full speed
with zero wait states
- Overlay
memory supporting standard as well as DRAM target memory configurations;
parity; dynamic bus sizing
- Integrated
"C" source-level debug in an interface supported on Microsoft Windows
3.1, 3.11, 95, 98, and NT
- Peripheral
window for viewing and editing of all internal registers
- Conversion
of chip selects into logical upper addresses for simple setup of overlay
and triggering
- Long,
flexible emulator-to-pod cables and small profile probe head, making
target connection easy
- 256K
frame trace buffer
- 8
event recognizers
- 4-level
sequential triggering
- Timestamp
with clock-cycle resolution
- Trace
dequeuer showing only executed instructions
- Cursor
link from Trace window to Source window showing source code aligned
with disassembled trace
- Ability
to view or modify target memory while emulator is running
- Ability
to view or edit all on-chip peripherals in symbolic form.
- Break-out
connector on probe head for Port B and C signals, providing easy access
for logic analyzer or oscilloscope
- Target
board with 128 KB of zero wait state SRAM, to support software development
and testing prior to target availability
Available
Option
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Powerscope
BDM Debugger
As
Motorola 683xx products go through die shrinks they are designed to meet
the new 3V standard. The 3V/5V auto-sense BDM Source Level Debugger supports
the 3V 68L331/332, 68340 and 68360.
System
Features
- Connection
via 10-pin BDM connector
- Integrated
C source-level debug in a Microsoft Windows interface
- Source
window
- Variable
window
- Stack
window
- Multiple
Memory windows
- CPU
Register window
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